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For the Inventor, By the Inventor

Kodaira, Japan

Shuya Fujita

This inventor holds 11 USPTO granted patents and 1 published patent application. Top assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd., Hitachi Vlsi Engineering Corp.. Active years: 1997-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shuya Fujita. Retrieved from https://idiyas.com/inventor/shuya-fujita

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 11 

% Patents Active = 90.9

Average Co-Inventor Count = 15.2

ph-index = 5

Forward Citations = 75(Granted Patents)


Location History:

  • Koganei, JP (2000)
  • Kodaira, JP (1997 - 2006)

Company Filing History:

goldMedal7 out of 42,743 
 
Hitachi, Ltd.
 patents
silverMedal5 out of 64 
 
Hitachi Microcomputer System, Ltd.
 patents
bronzeMedal4 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
4. 1 out of 3,781 
 
Renesas Technology Corp.
 patents
5. 3 out of 834,601 
Other
 patents
where one patent can have more than one assignee

Years Active: 1997-2006

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11 patents (USPTO):Explore Patents
1. 6996700 - Microcomputer and dividing circuit (2006-02-07),
2. 6343357 - Microcomputer and dividing circuit (2002-01-29),
3. 6272620 - Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation (2001-08-07),
4. 6253308 - Microcomputer having variable bit width area for displacement and circuit for handling immediate data larger than instruction word (2001-06-26),
5. 6205535 - Branch instruction having different field lengths for unconditional and conditional displacements (2001-03-20),
6. 6131154 - Microcomputer having variable bit width area for displacement (2000-10-10),
7. 6122724 - Central processing unit having instruction queue of 32-bit length (2000-09-19),
8. 6055651 - Emulator and corresponding trace control method (2000-04-25),
9. 5991545 - Microcomputer having variable bit width area for displacement and (1999-11-23),
10. 5969976 - Division circuit and the division method thereof (1999-10-19),
11. 5682545 - Microcomputer having 16 bit fixed length instruction format (1997-10-28),

Title: Shuya Fujita: Innovator in Microcomputer Technology

Introduction

Shuya Fujita is a prominent inventor based in Kodaira, Japan. He has made significant contributions to the field of microcomputer technology, holding a total of 11 patents. His work focuses on enhancing the efficiency and cost-effectiveness of microcomputers.

Latest Patents

Fujita's latest patents include innovations in microcomputers and dividing circuits. One of his notable inventions is a microcomputer (MCU) that adopts the general-purpose register method. This microcomputer is designed to have a small program capacity or high program memory efficiency while maintaining a low system cost. It simplifies instruction decoding similar to RISC machines by utilizing a fixed-length instruction format that has a power of 2 but a smaller bit number than the maximum data word length. The control of coded division is executed by noting the code bits, showcasing his innovative approach to microcomputer design.

Career Highlights

Throughout his career, Shuya Fujita has worked with notable companies such as Hitachi, Ltd. and Hitachi VLSI Engineering Corporation. His experience in these organizations has allowed him to develop and refine his inventions in microcomputer technology.

Collaborations

Fujita has collaborated with esteemed colleagues, including Shumpei Kawasaki and Eiji Sakakibara. These partnerships have contributed to the advancement of his projects and innovations.

Conclusion

Shuya Fujita's contributions to microcomputer technology through his patents and collaborations highlight his role as an influential inventor in the field. His work continues to impact the efficiency and design of microcomputers, paving the way for future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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