Shreyans Jain

Title: Shreyans Jain and Integrated Grid Cell Technology.

Introduction

Shreyans Jain is an inventor based in Delhi, India, whose patent work includes an integrated circuit design intended to help manage power-related effects. He is associated with NXP USA, Inc. His listed patent portfolio includes 1 patent.

Latest Patents

Jain is named on the patent “Integrated grid cell,” which describes an integrated grid cell for an integrated circuit. The design may correspond to an integrated one-grid cell or an integrated two-grid cell and uses polysilicon layers, metal-0 oxide diffusion (M0OD) layers, and a metal-0 polysilicon (M0PO) layer.

The arrangement creates potential differences between certain polysilicon and M0OD layers, forming parasitic capacitors. These capacitors function as decoupling capacitors intended to mitigate dynamic IR drop and supply noise in the integrated circuit.

Career Highlights

Jain’s disclosed patent work focuses on semiconductor design and power integrity. The integrated grid cell approach uses structures within the circuit to provide decoupling capacitance and address supply-related fluctuations.

Collaborations

Naveen Kumar and Raza Imam are identified as Jain’s coworkers. The available information does not specify their roles in the patent or the extent of their collaboration.

Conclusion

Shreyans Jain’s patent on integrated grid cell technology describes a semiconductor design that uses parasitic capacitance to help reduce dynamic IR drop and supply noise in integrated circuits.