Pleasanton, CA, United States of America

Sheng-Shiung Wu

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sheng-Shiung Wu. Retrieved from https://idiyas.com/inventor/sheng-shiung-wu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Sheng-Shiung Wu: Innovator in FPGA Prototyping Systems

Introduction

Sheng-Shiung Wu is a prominent inventor based in Pleasanton, CA (US). He has made significant contributions to the field of circuit design testing, particularly through his innovative work with Field Programmable Gate Arrays (FPGAs). His expertise and creativity have led to advancements that enhance the efficiency and effectiveness of prototyping systems.

Latest Patents

Wu holds a patent for a "Programmable sequence-driven hardware trigger for multiple FPGA system." This patent discloses systems and methods for a prototyping system that employs hardware known as 'Debug FPGA.' This hardware performs a series of Boolean evaluations based on testbench configurations loaded at runtime. The FPGAs that execute the Device Under Test (DUT) operate synchronously, ensuring that each component starts, stops, and steps through the DUT's operations according to the Boolean operations of the Debug FPGA. The disclosed hardware and software functions allow for the simultaneous stopping of the clocks of the FPGAs based on user-defined trigger conditions in the DUT output. This capability enables designers to halt the prototyping system for analysis or debugging purposes. The Boolean expressions of the Debug FPGA are designed to detect state transitions or trigger events occurring within the DUT. When a trigger event is detected, the Debug FPGA sends a clock-stopping signal to each of the FPGAs.

Career Highlights

Wu is currently employed at Cadence Design Systems, Inc., where he continues to innovate and contribute to the field of electronic design automation. His work has been instrumental in developing tools and systems that streamline the design process for engineers and researchers alike.

Collaborations

Throughout his career, Wu has collaborated with notable colleagues, including Shantanu Telharkar and Raju Joshi. These collaborations have fostered an environment of innovation and have led to the development of cutting-edge technologies in the field.

Conclusion

Sheng-Shiung Wu's contributions to FPGA prototyping systems exemplify the impact of innovative thinking in technology. His patent and ongoing work at Cadence Design Systems, Inc. highlight his role as a key figure in advancing circuit design testing methodologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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