Taipei, Taiwan

Shao-Yun Fang

This inventor holds 3 USPTO granted patents. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Synopsys, Inc.. Active years: 2015-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shao-Yun Fang. Retrieved from https://idiyas.com/inventor/shao-yun-fang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 66.7

Average Co-Inventor Count = 5.5

ph-index = 1

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2015-2021

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3 patents (USPTO):Explore Patents

Title: Innovations of Shao-Yun Fang

Introduction

Shao-Yun Fang is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of electronic design automation, holding a total of 3 patents. His work focuses on enhancing the efficiency and accuracy of circuit design and manufacturing processes.

Latest Patents

One of his latest patents is the "Pin accessibility prediction engine." This invention provides an efficient electronic structure for circuit design, testing, and manufacturing, aimed at validating cell layout designs using an intelligent engine trained with selectively arranged cells from a cell library. The initial design rule violation (DRV) prediction engine is trained using various pin patterns generated by predefined cell placement combinations. These pin patterns are pixelized and classified as either DRV pin patterns, which are likely to produce a DRV, or DRV-clean pin patterns, which are unlikely to produce a DRV.

Another notable patent is the "Layout design for electron-beam high volume manufacturing." This patent describes a method and apparatus for creating a physical layout for electron-beam lithography. It involves defining a layout grid for a physical design, which includes vertical grid lines that coincide with stitching lines resulting from partitioning the physical design into multiple subfields. The design is assembled according to design restrictions regarding the interaction between design shapes and the layout grid, optimizing the placement of design shapes along the routing grid.

Career Highlights

Shao-Yun Fang has worked with leading companies in the semiconductor industry, including Taiwan Semiconductor Manufacturing Company Ltd. and Synopsys, Inc. His experience in these organizations has allowed him to develop innovative solutions that address complex challenges in electronic design.

Collaborations

Throughout his career, Shao-Yun has collaborated with notable professionals in the field, including Hung-Chun Wang and Tzu-Chin Lin. These collaborations have contributed to the advancement of technology in circuit design and manufacturing.

Conclusion

Shao-Yun Fang's contributions to the field of electronic design automation are noteworthy. His innovative patents and career achievements reflect his dedication to improving circuit design processes. His work continues to influence the industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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