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For the Inventor, By the Inventor

San Jose, CA, United States of America

Shane J Keil

USPTO Granted Patents = 45 

 

Average Co-Inventor Count = 3.4

ph-index = 7

Forward Citations = 151(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2012 - 2016)
  • San Jose, CA (US) (2009 - 2024)

Company Filing History:

goldMedal34 out of 40,816 
 
Apple Inc.
 patents
silverMedal11 out of 5,406 
 
Nvidia Corporation
 patents

Years Active: 2009-2025

where 'Filed Patents' based on already Granted Patents

45 patents (USPTO):
1. 12460950 - System on a chip with always-on processor (2025-11-04),
2. 12346566 - Write arbiter circuit with per-rank allocation override mode (2025-07-01),
3. 12314196 - Memory device bandwidth optimization (2025-05-27),
4. 12216594 - Read arbiter circuit with dual memory rank support (2025-02-04),
5. 12118249 - Memory bank hotspotting (2024-10-15),
6. 12117320 - System on a chip with always-on component with powered-down configurations to process audio samples (2024-10-15),
7. 11914532 - Memory device bandwidth optimization (2024-02-27),
8. 11847348 - Multi-activation techniques for partial write operations (2023-12-19),
9. 11403037 - Ordering memory requests based on access efficiency (2022-08-02),
10. 11221798 - Write/read turn techniques based on latency tolerance (2022-01-11),
11. 11100013 - Scheduling of read and write memory access requests (2021-08-24),
12. 11079261 - System on a chip with always-on processor (2021-08-03),
13. 10901617 - Memory access scheduling using category arbitration (2021-01-26),
14. 10817219 - Memory access scheduling using a linked list (2020-10-27),
15. 10777252 - System and method for performing per-bank memory refresh (2020-09-15),

Title: Innovative Contributions of Shane J. Keil in Memory Control Circuits

Introduction

Shane J. Keil, based in San Jose, CA, is an accomplished inventor with a remarkable portfolio of 42 patents. His work primarily focuses on innovations in memory control circuits and systems. Keil has made significant contributions to the field of computing, particularly in enhancing memory efficiency and performance.

Latest Patents

One of his latest patents, titled "Read Arbiter Circuit with Dual Memory Rank Support," outlines a memory control circuit designed to manage multiple memory ranks efficiently. This circuit allocates write requests to different slots depending on the target memory rank and optimizes available slots to bolster write efficiency. Another notable patent, focused on "Memory Bank Hotspotting," introduces a system that ensures fair access to memory devices. In this system, a memory controller's arbiter categorizes requests to enhance virtual channel distribution while addressing bank hotspots effectively. These innovations reflect Keil's commitment to advancing memory technology.

Career Highlights

Throughout his impressive career, Shane J. Keil has gained valuable experience working with prominent technology companies. He has notably served at Apple Inc. and Nvidia Corporation, where his expertise in memory systems has contributed to groundbreaking advancements in their product offerings.

Collaborations

Keil has also collaborated with esteemed professionals in the field, including Erik P. Machnicki and Gregory S. Mathews. Their partnerships have likely fostered innovative ideas and solutions, further enabling advancements in memory control technologies.

Conclusion

In summary, Shane J. Keil stands out as a leading inventor in the realm of memory control circuits. His latest patents demonstrate his continuous effort to improve memory system efficiency and reliability. With a rich background working at industry giants and collaborating with talented engineers, Keil's contributions are paving the way for future innovations in computing technology.

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