Shaishav A Desai

This inventor holds 23 USPTO granted patents and 4 published patent applications and 1 EPO patent. Top assignees: Sun Microsystems, Inc., Microsoft Technology Licensing, LLC, Apple Inc.. Active years: 2002-2026.

USPTO Granted Patents = 23 (Patent Applications = 4)

% Patents Active = 87.0

EPO Patents = 1 (Patent Applications = 2)

Average Co-Inventor Count = 2.9

ph-index = 6

Forward Citations = 122(Granted Patents)

Location History:

Sunnyvale, CA (US) (2003 - 2012)
San Jose, CA (US) (2002 - 2024)
San Diego, CA (US) (2024)

Company Filing History:

12 out of 7,642

Sun Microsystems, Inc.

patents

6 out of 56,215

Microsoft Technology Licensing, LLC

Years Active: 2002-2026

Loading Chart...

23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12750059 - Clocking system for a system on chip using PLL (2026-09-29),

2. 12748713 - Multi-die systems with modular die-to-die link macros for enabling die-to-die communication (2026-09-29),

3. 12463649 - Digital phase-locked loops (PLL) including closed-loop time-to-digital converter (TDC) gain calibration circuits and related methods (2025-11-04),

4. 12019494 - Domain clock and power activation control circuit to reduce voltage droop and related methods (2024-06-25),

5. 11953527 - Peak voltage amplitude detectors tolerant to process variation and device mismatch and related methods (2024-04-09),

6. 11838153 - Digital signal processors providing scalable decision feedback equalization (DFE) employing sequence selection and related methods (2023-12-05),

7. 10320370 - Methods and circuits for adjusting parameters of a transceiver (2019-06-11),

8. 9960771 - Hum generation using representative circuitry (2018-05-01),

9. 8341578 - Clock gater with test features and low setup time (2012-12-25),

10. 8044724 - Low jitter large frequency tuning LC PLL for multi-speed clocking applications (2011-10-25),

11. 7779372 - Clock gater with test features and low setup time (2010-08-17),

12. 7136774 - Sense amplifier thermal correction scheme (2006-11-14),

13. 7123995 - Dynamic circuit operation adjustment based on distributed on-chip temperature sensors (2006-10-17),

14. 7069459 - Clock skew reduction technique based on distributed process monitors (2006-06-27),

15. 6914452 - Adaptive keeper sizing for dynamic circuits based on fused process corner data (2005-07-05),

Title: Shaishav A Desai - Pioneering Inventor from San Jose

Introduction: Shaishav A Desai is a renowned inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Shaishav A Desai holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Shaishav A Desai has worked with top tech companies, leading research institutions, and universities, shaping the future of technology through his innovative solutions.

Collaborations: Throughout his career, Shaishav A Desai has collaborated with fellow inventors, patent attorneys, and industry experts to bring revolutionary ideas to life, fostering a culture of innovation and creativity.

Conclusion: Shaishav A Desai's passion for pushing the boundaries of technology and his relentless pursuit of innovation continue to inspire the next generation of inventors and entrepreneurs worldwide.