San Jose, CA, United States of America

Seu Wah Low

USPTO Granted Patents = 2 

Average Co-Inventor Count = 5.1

ph-index = 2

Forward Citations = 17(Granted Patents)


Company Filing History:


Years Active: 2013-2015

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2 patents (USPTO):

Title: The Innovations of Seu Wah Low: A Look at His Patents and Contributions

Introduction: Seu Wah Low is an accomplished inventor based in San Jose, CA, with a notable focus on advancements in transceiver technology and FIFO buffer latency estimation. With two patents to his name, his contributions speak volumes about his expertise in electrical engineering and his role in enhancing communication technologies.

Latest Patents: Seu Wah Low's latest innovations include a patent for a transceiver designed to provide a clock signal. This apparatus involves a transmitter-side transceiver that utilizes multiple periodic signal sources and incorporates a multiplexer and phase interpolator to efficiently output a clock signal. Additionally, he developed a patent focused on estimating latency in FIFO buffers, which employs a detection method for identifying patterns in data values, allowing for accurate estimation of buffer latency.

Career Highlights: Currently employed at Xilinx, Inc., Seu Wah Low has made significant strides in the field of electronics and communication. His work at Xilinx emphasizes innovation and efficiency, contributing to the development of state-of-the-art technology solutions.

Collaborations: Throughout his career, Seu has had the opportunity to work alongside talented individuals like Christopher J. Borrelli and Loren Jones. These collaborations have fostered a dynamic environment for innovation and the exchange of ideas, enhancing the overall quality of work produced.

Conclusion: As an inventor, Seu Wah Low has significantly impacted technological advancements through his innovative patents and contributions at Xilinx, Inc. His work exemplifies the importance of collaboration and the drive for innovation within the field of electrical engineering.

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