The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2015

Filed:

Aug. 08, 2013
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Alan C. Wong, Sunnyvale, CA (US);

Christopher J. Borrelli, Campbell, CA (US);

Loren Jones, Aromas, CA (US);

Seu Wah Low, San Jose, CA (US);

Parag Upadhyaya, Los Gatos, CA (US);

Robert M. Ondris, Santa Clara, CA (US);

Sarosh I. Azad, Fremont, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/40 (2015.01);
U.S. Cl.
CPC ...
H04B 1/40 (2013.01);
Abstract

An apparatus relating generally to a transmitter-side of a transceiver or a transmitter used to provide a clock signal is disclosed. In this apparatus, a first signal source is to provide a first periodic signal. A second signal source is to provide a second periodic signal. A first multiplexer is coupled to receive the first periodic signal and the second periodic signal to provide a selected one thereof as a first selected output. A phase interpolator is coupled to the first multiplexer to receive the first selected output. The phase interpolator includes a second multiplexer. The second multiplexer is coupled to receive the first selected output and a phase-interpolated version of the first selected output to output a selected one thereof as a second selected output. A divider is coupled to the second multiplexer to receive the second selected output to provide the clock signal.


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