Tokyo, Japan

Seiya Nakano

This inventor holds 6 USPTO granted patents and 3 published patent applications. Top assignee: Mitsubishi Electric Corporation. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seiya Nakano. Retrieved from https://idiyas.com/inventor/seiya-nakano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 6 

% Patents Active = 66.7

Average Co-Inventor Count = 1.9

ph-index = 1


Company Filing History:


Years Active: 2014-2026

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6 patents (USPTO):Explore Patents

Title: Seiya Nakano: Innovator in Semiconductor Technology

Introduction

Seiya Nakano is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 6 patents. His work focuses on enhancing the performance and reliability of semiconductor devices.

Latest Patents

Among his latest patents is a semiconductor device that features a unique structure involving a surface metal, protective films, and a metal film designed to optimize light transparency and mechanical strength. Another notable patent details a manufacturing method for a semiconductor device that includes an aluminum electrode and a metallic film for solder joints, which effectively prevents cracking during the joining process.

Career Highlights

Seiya Nakano is currently employed at Mitsubishi Electric Corporation, where he continues to innovate and develop advanced semiconductor technologies. His expertise in this area has positioned him as a key player in the industry.

Collaborations

He collaborates with talented coworkers such as Yosuke Nakata and Takuya Hamaguchi, contributing to a dynamic team focused on pushing the boundaries of semiconductor innovation.

Conclusion

Seiya Nakano's work in semiconductor technology exemplifies the spirit of innovation and dedication to improving electronic devices. His patents reflect a commitment to advancing the field and ensuring the reliability of semiconductor applications.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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