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For the Inventor, By the Inventor

Catskill, NY, United States of America

Scott Barnett Swaney

This inventor holds 42 USPTO granted patents and 1 EPO patent, primarily in Processor Architecture. Top assignee: International Business Machines Corporation. Active years: 1997-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Scott Barnett Swaney. Retrieved from https://idiyas.com/inventor/scott-barnett-swaney

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 42

% Patents Active = 21.4

 

Average Co-Inventor Count = 4.8

ph-index = 9

Forward Citations = 331(Granted Patents)


Location History:

  • Castskill, NY (US) (2001)
  • Caskill, NY (US) (2005)
  • Catskill, NY (US) (1997 - 2012)
  • New York, NY (US) (2012)
  • Germantown, NY (US) (2010 - 2022)

Company Filing History:

goldMedal42 out of 166,325 
 
International Business Machines Corporation
 patents

Years Active: 1997-2022

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Areas of Expertise:
Error Checking
Multi-Core Systems
Performance Optimization
Data Processing
Fault Tolerance
Processor Instruction
Hardware Access
EDRAM Refresh Rates
Pipelined Processor
Transient Particle Errors
Clock Signal Generation
Reliability Enhancement
42 patents (USPTO):Explore Patents
1. 11226839 - Maintaining compatibility for complex functions over multiple machine generations (2022-01-18),
2. 10579499 - Task latency debugging in symmetric multiprocessing computer systems (2020-03-03),
3. 9348686 - Error checking using serial collection of error data (2016-05-24),
4. 9342395 - Error checking using serial collection of error data (2016-05-17),
5. 9164761 - Obtaining data in a pipelined processor (2015-10-20),
6. 8560767 - Optimizing EDRAM refresh rates in a high performance cache architecture (2013-10-15),
7. 8499144 - Updating settings of a processor core concurrently to the operation of a multi core processor system (2013-07-30),
8. 8244972 - Optimizing EDRAM refresh rates in a high performance cache architecture (2012-08-14),
9. 8135960 - Multiprocessor electronic circuit including a plurality of processors and electronic data processing system (2012-03-13),
10. 8127118 - Microarchitecture, method and computer program product for efficient data gathering from a set of trace arrays (2012-02-28),
11. 8122297 - Method and apparatus for parallel and serial data transfer (2012-02-21),
12. 8090929 - Generating clock signals for coupled ASIC chips in processor interface with X and Y logic operable in functional and scanning modes (2012-01-03),
13. 8090823 - Providing low-level hardware access to in-band and out-of-band firmware (2012-01-03),
14. 7966536 - Method and apparatus for automatic scan completion in the event of a system checkstop (2011-06-21),
15. 7916722 - Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor (2011-03-29),

Title: Scott Barnett Swaney: Innovator in Advanced Computing

Introduction

Scott Barnett Swaney, based in Catskill, NY, is a distinguished inventor recognized for his substantial contributions to the field of computer systems. With an impressive portfolio of 42 patents, Swaney's work primarily focuses on enhancing machine compatibility and optimizing performance in multiprocessing environments.

Latest Patents

Among his recent innovations are two notable patents:

1. **Maintaining compatibility for complex functions over multiple machine generations** - This patent presents a system comprising a plurality of machines, including first and second generation models. It introduces a virtual architecture level that ensures compatibility for complex interruptible instructions across these generations by establishing a lowest common denominator indicator.

2. **Task latency debugging in symmetric multiprocessing computer systems** - This patent outlines a method for improving debugging in systems with multiple hardware threads. It describes a technique for receiving timer values for each thread and comparing it with a threshold, allowing for efficient logging and control of thread execution based on task latency.

Career Highlights

Scott Barnett Swaney works at IBM (International Business Machines Corporation), where he has made significant progress in developing computing technologies. His expertise in managing complex systems has paved the way for advancements in machine compatibility and efficiency. His innovative mindset continuously drives the evolution of computing platforms.

Collaborations

During his career, Swaney has collaborated with notable professionals such as Tobias Webel and James Stephen Fields, Jr. These partnerships highlight the collective effort in pushing the boundaries of technological innovation within IBM.

Conclusion

Scott Barnett Swaney exemplifies the spirit of innovation within the technological domain. His extensive patent portfolio and collaborative efforts have played a vital role in shaping advanced computing solutions. As technology continues to evolve, Swaney's contributions will undoubtedly leave a lasting impact on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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