San Jose, CA, United States of America

Sandip Das


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 35(Granted Patents)


Location History:

  • San Francisco, CA (US) (2017)
  • San Jose, CA (US) (2018)

Company Filing History:


Years Active: 2017-2018

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2 patents (USPTO):Explore Patents

Title: Sandip Das: Innovator in System-on-Chip Technology

Introduction

Sandip Das is a prominent inventor based in San Jose, CA, known for his contributions to the field of system-on-chip technology. With a total of 2 patents, he has made significant strides in enhancing the efficiency of hardware elements in Network on Chip (NoC) systems.

Latest Patents

His latest patents focus on clock gating for system-on-chip elements. One of the key aspects of his innovation involves a hardware element that includes a clock gating circuit. This circuit is designed to configure neighboring hardware elements to activate before receiving new incoming data and to enter a sleep mode after a defined number of cycles. The defined number of cycles can be counted from a cycle that has no incoming data or when all data within an input queue of a source hardware element has been cleared.

Career Highlights

Sandip Das is currently employed at Netspeed Systems, where he continues to develop cutting-edge technologies in the semiconductor industry. His work has been instrumental in advancing the capabilities of NoC systems, making them more efficient and responsive.

Collaborations

He collaborates with talented professionals in his field, including Sailesh Kumar and Poonacha Kongetira. Their combined expertise contributes to the innovative projects at Netspeed Systems.

Conclusion

Sandip Das is a key figure in the realm of system-on-chip technology, with a focus on improving hardware efficiency through innovative clock gating solutions. His contributions are shaping the future of semiconductor design and implementation.

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