Hillsboro, OR, United States of America

Sameerah Desnavi

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Intel Corporation. Active years: 2026.

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Sameerah Desnavi - Innovator in Semiconductor Technology

Introduction

Sameerah Desnavi is an inventor based in Hillsboro, OR (US). He is known for his contributions to semiconductor technology, particularly in the development of gate-all-around devices. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

Sameerah Desnavi has submitted several notable patent applications, including:

1. **GATE-ALL-AROUND DEVICES WITH DIFFERENT GATE LENGTHS** - This application describes techniques for forming semiconductor devices with varying gate lengths on the same die. The first semiconductor devices feature first gate structures around first semiconductor regions, while the second semiconductor devices have second gate structures around second semiconductor regions. The first gate structures possess a shorter gate length compared to the second gate structures, which have a longer gate length. Despite the diversity in gate lengths, the upper thickness of both gate structures remains consistent. Additionally, the first semiconductor devices include first inner spacer structures that have a greater lateral thickness than the second inner spacer structures of the second semiconductor devices.

2. **SOURCE AND DRAIN REGIONS FOR LATERALLY ADJACENT GATE-ALL-AROUND (GAA) PMOS AND NMOS** - This application outlines an integrated circuit that includes laterally adjacent devices. The first device consists of a first source or drain region, a first gate structure, and a first inner spacer. The second device similarly includes a second source or drain region, a second gate structure, and a second inner spacer. Notably, the widths of the source or drain regions and inner spacers differ by at least 1 nanometer, showcasing precision in semiconductor design.

Conclusion

Sameerah Desnavi is an innovative inventor whose work in semiconductor technology demonstrates a commitment to advancing the field. His latest patent applications reflect his expertise and potential for future contributions to the industry.

Profile summary based on public USPTO records.
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