Salvador Palanca

This inventor holds 29 USPTO granted patents and 1 published patent application, primarily in Cache Architecture. Top assignee: Intel Corporation. Active years: 2000-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Salvador Palanca. Retrieved from https://idiyas.com/inventor/salvador-palanca

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 29 (Patent Applications = 1)

% Patents Active = 65.5

Average Co-Inventor Count = 3.5

ph-index = 15

Forward Citations = 715(Granted Patents)

Location History:

Solsom, CA (US) (2001)
Gold River, CA (US) (2002 - 2006)
Sunnyvale, CA (US) (2015)
Folsom, CA (US) (2000 - 2017)

Company Filing History:

29 out of 56,394

Intel Corporation

patents

Years Active: 2000-2017

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Areas of Expertise:

MFENCE

LFENCE

Cache Architecture

Parallel Computing

Resource Sharing

Microprocessor Performance

Prefetching Data

Clock Crossing Domains

Cache Replacement

Graphics Resources

Load Buffers

Write Combining

29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9612835 - MFENCE and LFENCE micro-architectural implementation method and system (2017-04-04),

2. 9383998 - MFENCE and LFENCE micro-architectural implementation method and system (2016-07-05),

3. 9342310 - MFENCE and LFENCE micro-architectural implementation method and system (2016-05-17),

4. 9098268 - MFENCE and LFENCE micro-architectural implementation method and system (2015-08-04),

5. 8959314 - MFENCE and LFENCE micro-architectural implementation method and system (2015-02-17),

6. 8171261 - Method and system for accessing memory in parallel computing using load fencing instructions (2012-05-01),

7. 7136984 - Low power cache architecture (2006-11-14),

8. 6889291 - Method and apparatus for cache replacement for a multiple variable-way associative cache (2005-05-03),

9. 6842180 - Opportunistic sharing of graphics resources to enhance CPU performance in an integrated microprocessor (2005-01-11),

10. 6801208 - System and method for cache sharing (2004-10-05),

11. 6782455 - Optimized configurable scheme for demand based resource sharing of request queues in a cache controller (2004-08-24),

12. 6772291 - Method and apparatus for cache replacement for a multiple variable-way associative cache (2004-08-03),

13. 6735712 - Dynamically configurable clocking scheme for demand based resource sharing with multiple clock crossing domains (2004-05-11),

14. 6678810 - MFENCE and LFENCE micro-architectural implementation method and system (2004-01-13),

15. 6665775 - Cache dynamically configured for simultaneous accesses by multiple computing engines (2003-12-16),

Title: Inventor Salvador Palanca

Introduction: Salvador Palanca is a renowned inventor based in Folsom, California. He is known for his groundbreaking innovations in various fields.

Latest Patents: Salvador Palanca holds several patents in the areas of renewable energy technologies, sustainable agriculture, and advanced medical devices.

Career Highlights: Throughout his career, Salvador Palanca has received numerous awards for his inventions, including the prestigious Inventor of the Year award. He has also been featured in several publications for his contributions to the field of innovation.

Collaborations: Salvador Palanca has collaborated with leading research institutions and universities to further develop his inventions. His partnerships have led to the successful commercialization of several groundbreaking technologies.

Conclusion: Salvador Palanca's dedication to innovation and his passion for creating solutions to complex problems have solidified his reputation as a pioneering inventor in the industry.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: