Plano, TX, United States of America

Sahir Shiraz Hoda

This inventor holds 2 USPTO granted patents. Top assignee: Hewlett-Packard Development Company, L.p.. Active years: 2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sahir Shiraz Hoda. Retrieved from https://idiyas.com/inventor/sahir-shiraz-hoda

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.4

ph-index = 2

Forward Citations = 25(Granted Patents)


Location History:

  • Plano, TX (US) (2008)
  • Dallas, TX (US) (2008)

Company Filing History:


Years Active: 2008

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2 patents (USPTO):Explore Patents

Title: Sahir Shiraz Hoda: Innovator in Hardware Verification

Introduction

Sahir Shiraz Hoda is a notable inventor based in Plano, TX (US). He has made significant contributions to the field of hardware verification, holding 2 patents that showcase his innovative techniques and methodologies.

Latest Patents

Hoda's latest patents include groundbreaking work in hardware verification scripting. One of his patents describes exemplary techniques for verifying a hardware design. In this embodiment, a method comprises compiling an error verification object corresponding to an error verification command to verify a portion of a hardware design of a device under test. The error verification object is compiled in accordance with data provided by an error scripting module, which has access to hardware-specific data corresponding to the hardware design of the device under test. The compiled object is sent to the device under test, and a response is received and parsed according to the data provided by the error scripting module.

Another significant patent focuses on systems and methods for scripting data errors to facilitate the verification of error detection or correction code functionality. This method involves receiving a data corruption command for a plurality of bits and determining a plurality of bit fields within those bits for data corruption. The process includes inserting a minimum number of errors into each bit field at random locations and randomly inserting additional errors until the total number of errors is achieved.

Career Highlights

Sahir Hoda is currently employed at Hewlett-Packard Development Company, L.P., where he continues to innovate in the field of hardware verification. His work has been instrumental in advancing the methodologies used in error detection and correction.

Collaborations

Hoda has collaborated with notable colleagues such as Nathan Dirk Zelle and Anand V Kamannavar, contributing to a dynamic work environment that fosters innovation and creativity.

Conclusion

Sahir Shiraz Hoda is a distinguished inventor whose work in hardware verification has led to significant advancements in the field. His patents reflect a deep understanding of error detection and correction methodologies, making him a valuable asset in the technology sector.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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