Hewlett-Packard Development Company, L.p.

Sahir Shiraz Hoda

Nathan Dirk Zelle

Anand V Kamannavar

Bradley Forrest Bass

Erich Matthew Gens

Brad F Bass

Exemplary techniques for verifying a hardware design are described. In a described embodiment, a method comprises compiling an error verification object corresponding to an error verification command to verify a portion of a hardware design of a device under test. The error verification object is compiled in accordance with data provided by an error scripting module. The error scripting module has access to hardware-specific data corresponding to the hardware design of the device under test. The compiled object is sent to the device under test and a response to the compiled object is received from the device under test. The received response from the device under test is parsed in accordance with data provided by the error scripting module.

Hardware verification scripting

In one embodiment, the present invention is directed to a method for inserting errors into data to facilitate validation of an error detection algorithm. The method comprises: receiving a data corruption command for a plurality of bits; determining, from the data corruption command, a plurality of bit fields within the plurality of bits for data corruption; determining a minimum and maximum number of errors for each of the plurality of bit fields; determining a total number of errors to be inserted; inserting the minimum number of errors into each of the plurality of bit fields at random locations; and randomly inserting additional errors into the plurality of bit fields subject to the maximum number of errors until the total number of errors are inserted.

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Plano, TX, United States of America

Sahir Shiraz Hoda