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S Babar Raza

This inventor holds 49 USPTO granted patents, primarily in Memory Architecture. Top assignee: Cypress Semiconductor Corporation. Active years: 1996-2011.

USPTO Granted Patents = 49

% Patents Active = 87.8

Average Co-Inventor Count = 1.7

ph-index = 12

Forward Citations = 438(Granted Patents)

Location History:

Santa Clara, CA (US) (2000 - 2001)
Sunnyvale, CA (US) (1996 - 2003)
Milpitas, CA (US) (2002 - 2008)
San Jose, CA (US) (2003 - 2011)

Company Filing History:

49 out of 3,596

Cypress Semiconductor Corporation

patents

Years Active: 1996-2011

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Areas of Expertise:

Dual-Ported Memory

FIFO Protocols

Clock Synchronization

Multicast Operations

Queue Expansion

Programmable Interconnect

Switch Fabrics

High Speed Sampling

Arbitration Logic

Ethernet Aggregation

Pulse Width Control

Memory Access

49 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7934057 - Logic for implementing a dual clock domain read access with predictable timing for bi-directional inputs/outputs (2011-04-26),

2. 7738496 - Device that provides the functionality of dual-ported memory using single-ported memory for multiple clock domains (2010-06-15),

3. 7382805 - Method and apparatus for aggregating Ethernet streams (2008-06-03),

4. 7343510 - Method and device for selecting one of multiple clock signals based on frequency differences of such clock signals (2008-03-11),

5. 7334147 - Method and architecture for synchronizing a path generator and/or extractor to a processor (2008-02-19),

6. 7184359 - System and method for staging concurrent accesses to a memory address location via a single port using a high speed sampling clock (2007-02-27),

7. 7016349 - Logic for generating multicast/unicast address (es) (2006-03-21),

8. 6925506 - Architecture for implementing virtual multiqueue fifos (2005-08-02),

9. 6917661 - Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detector (2005-07-12),

10. 6816979 - Configurable fast clock detection logic with programmable resolution (2004-11-09),

11. 6816955 - Logic for providing arbitration for synchronous dual-port memory (2004-11-09),

12. 6810098 - FIFO read interface protocol (2004-10-26),

13. 6715021 - Out-of-band look-ahead arbitration method and/or architecture (2004-03-30),

14. 6665265 - Overhead serial communication scheme (2003-12-16),

15. 6657472 - Circuit, system, and method for programmably setting an input to a prioritizer of a latch to avoid a non-desired output state of the latch (2003-12-02),

Title: The Innovative Journey of Inventor S Babar Raza

Introduction: S Babar Raza is a visionary inventor based in Milpitas, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: S Babar Raza holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his commitment to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over two decades, S Babar Raza has worked with leading tech companies, spearheading research and development projects that have led to significant technological breakthroughs.

Collaborations: Throughout his career, S Babar Raza has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and creativity that has resulted in cutting-edge inventions.

Conclusion: S Babar Raza's relentless pursuit of innovation and his passion for creating technology that shapes the future make him a true pioneer in the field of inventions.

Profile summary based on public USPTO records.

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