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For the Inventor, By the Inventor

Palo-Alto, CA, United States of America

Robert S Schreiber

This inventor holds 56 USPTO granted patents and 5 EPO patents, primarily in Memory Management (CPC class G06F). Top assignees: Hewlett-Packard Development Company, L.p., Hewlett Packard Enterprise Development LP, Hewlett-Packard Company. Active years: 1989-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert S Schreiber. Retrieved from https://idiyas.com/inventor/robert-s-schreiber

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 56

% Patents Active = 69.6

 

Average Co-Inventor Count = 3.1

ph-index = 11

Forward Citations = 796(Granted Patents)

Forward Citations (Not Self Cited) = 781(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Pal Alto, CA (US) (2006)
  • Palo Alto, TX (US) (2015)
  • Palo Alto, CA (US) (1989 - 2020)

Company Filing History:

goldMedal32 out of 27,667 
 
Hewlett-Packard Development Company, L.p.
 patents
silverMedal15 out of 5,644 
 
Hewlett Packard Enterprise Development LP
 patents
bronzeMedal5 out of 9,639 
 
Hewlett-Packard Company
 patents
4. 2 out of 24,257 
 
Xerox Corporation
 patents
5. 1 out of 44,831 
 
Qualcomm Incorporated
 patents
6. 1 out of 3 
 
Saxpy Computer Corporation
 patents

Years Active: 1989-2020

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Areas of Expertise:
Shared Memory
Memory Controllers
High Performance Computing
Error Handling
Multi-Level Cell
Checkpoint Generation
Network Communication
Optical Interconnect
Power Management
Parallel Processing
Data Integrity
Adaptive Packet Routing
56 patents (USPTO):Explore Patents
1. 10698878 - Graph update flush to a shared memory (2020-06-30),
2. 10621040 - Memory controllers to form symbols based on bursts (2020-04-14),
3. 10565037 - Data update of shared fabric memory in a high performance computing system (2020-02-18),
4. 10254988 - Memory device write based on mapping (2019-04-09),
5. 10025663 - Local checkpointing using a multi-level cell (2018-07-17),
6. 9934085 - Invoking an error handler to handle an uncorrectable error (2018-04-03),
7. 9846653 - Performing write operations on main memory (2017-12-19),
8. 9792182 - Checkpoint generation (2017-10-17),
9. 9710335 - Versioned memory Implementation (2017-07-18),
10. 9614728 - Identifying network communication patterns (2017-04-04),
11. 9601189 - Representing data using a group of multilevel memory cells (2017-03-21),
12. 9575542 - Computer power management (2017-02-21),
13. 9411657 - Load-balanced sparse array processing (2016-08-09),
14. 9405922 - Computer-implemented method for role discovery and simplification in access control systems (2016-08-02),
15. 9405921 - Computer-implemented method for role discovery in access control systems (2016-08-02),

Title: The Innovative Journey of Robert S. Schreiber

Introduction: Robert S. Schreiber is a renowned inventor based in Palo Alto, California, known for his groundbreaking contributions to various fields through his innovative creations.

Latest Patents: Robert S. Schreiber holds several patents in the areas of technology, healthcare, and sustainable energy, showcasing his diverse range of expertise and interests.

Career Highlights: With a career spanning over two decades, Robert has worked with leading tech companies, research institutions, and universities, consistently pushing the boundaries of innovation and creativity.

Collaborations: Throughout his career, Robert has collaborated with top inventors, patent attorneys, and companies worldwide, fostering a culture of knowledge sharing and collective growth in the innovation landscape.

Conclusion: Robert S. Schreiber's passion for innovation, coupled with his relentless drive to create a positive impact on society, solidifies his position as a visionary inventor shaping the future of technology and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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