The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2017
Filed:
Apr. 24, 2013
Applicant:
Hewlett-packard Development Company, L.p., Houston, TX (US);
Inventors:
Doe Hyun Yoon, Palo Alto, CA (US);
Jichuan Chang, Palo Alto, CA (US);
Naveen Muralimanohar, Palo Alto, CA (US);
Robert Schreiber, Palo Alto, CA (US);
Norman P. Jouppi, Palo Alto, CA (US);
Assignee:
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 11/56 (2006.01); G11C 29/42 (2006.01); G11C 29/52 (2006.01); G11C 29/00 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5678 (2013.01); G06F 11/073 (2013.01); G06F 11/0793 (2013.01); G06F 11/1004 (2013.01); G11C 11/56 (2013.01); G11C 13/0004 (2013.01); G11C 13/0069 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); G11C 29/70 (2013.01); G11C 29/76 (2013.01); G11C 2211/5647 (2013.01);
Abstract
A memory device includes a group or block of k-level memory cells, where k>2, and where each of the k-level memory cells has k programmable states represented by respective resistance levels.