Company Filing History:
Years Active: 2010-2014
Title: Richard Schoonover: Innovator in Integrated Circuit Testing
Introduction
Richard Schoonover is a notable inventor based in Binghamton, NY (US). He has made significant contributions to the field of integrated circuit testing, holding a total of 3 patents. His work focuses on improving the efficiency and accuracy of testing methodologies for system-on-chip (SoC) designs.
Latest Patents
One of Schoonover's latest patents is titled "Method and apparatus for automated extraction of a design for test boundary model from embedded IP cores for hierarchical and three-dimensional interconnect test." This invention addresses the challenges posed by SoC designs that incorporate IP cores with standardized wrapper cells. The patent outlines a method for extracting a boundary model from the design, which simplifies the testing process and enhances test coverage. Another significant patent is "System to control insertion of care-bits in an IC test vector improved optical probing." This invention relates to generating test vectors that facilitate the analysis and debugging of integrated circuits by utilizing a predictable sequence of care bits.
Career Highlights
Richard Schoonover is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of electronic design automation. His work has been instrumental in advancing testing methodologies that are crucial for the reliability of integrated circuits.
Collaborations
Schoonover has collaborated with notable colleagues such as Joseph Michael Swenton and Thomas Webster Bartenstein, contributing to a dynamic work environment that fosters innovation.
Conclusion
Richard Schoonover's contributions to integrated circuit testing exemplify the impact of innovative thinking in technology. His patents not only enhance testing efficiency but also pave the way for future advancements in the field.