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Santa Clara, CA, United States of America

Ramesh K Panwar

This inventor holds 45 USPTO granted patents, primarily in Processor Architecture. Top assignees: Sun Microsystems, Inc., Intel Corporation, Samsung Electronics Co., Ltd.. Active years: 1998-2001.

USPTO Granted Patents = 45

% Patents Active = 100.0

Average Co-Inventor Count = 1.8

ph-index = 17

Forward Citations = 1,034(Granted Patents)

Location History:

Pleasanton, CA (US) (1999)
Sunnyvale, CA (US) (2000)
Santa Clara, CA (US) (1998 - 2001)

Company Filing History:

41 out of 7,642

Sun Microsystems, Inc.

Samsung Electronics Co., Ltd.

patents

Years Active: 1998-2001

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Areas of Expertise:

Branch Prediction

Cache Memory

Out-Of-Order Execution

Multi-Ported Logic

Thermal Overload Detection

Instruction Fetch

Dependency Resolution

Superscalar Machine

Architectural Update

Execution Resources

Load Boosting

Program Correctness

45 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6289441 - Method and apparatus for performing multiple branch predictions per cycle (2001-09-11),

2. 6256729 - Method and apparatus for resolving multiple branches (2001-07-03),

3. 6256709 - Method for storing data in two-way set associative odd and even banks of a cache memory (2001-07-03),

4. 6240502 - Apparatus for dynamically reconfiguring a processor (2001-05-29),

5. 6219778 - Apparatus for generating out-of-order results and out-of-order condition codes in a processor (2001-04-17),

6. 6219723 - Method and apparatus for moderating current demand in an integrated circuit processor (2001-04-17),

7. 6154812 - Method for inhibiting thrashing in a multi-level non-blocking cache (2000-11-28),

8. 6148371 - Multi-level non-blocking cache system with inhibiting thrashing (2000-11-14),

9. 6144982 - Pipeline processor and computing system including an apparatus for (2000-11-07),

10. 6105128 - Method and apparatus for dispatching instructions to execution units in (2000-08-15),

11. 6098165 - Fetching and handling a bundle of instructions comprising instructions (2000-08-01),

12. 6094719 - Reducing data dependent conflicts by converting single precision (2000-07-25),

13. 6085305 - Apparatus for precise architectural update in an out-of-order processor (2000-07-04),

14. 6081873 - In-line bank conflict detection and resolution in a multi-ported (2000-06-27),

15. 6075931 - Method for efficient implementation of multi-ported logic FIFO (2000-06-13),

Title: The Innovative Journey of Ramesh K Panwar

Introduction:

Ramesh K Panwar, a visionary inventor based in Santa Clara, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents:

Panwar's latest patents include cutting-edge solutions in artificial intelligence, machine learning, and renewable energy technologies, showcasing his commitment to driving progress in these crucial areas.

Career Highlights:

With over two decades of experience in the tech industry, Panwar has held key roles in leading research institutions and tech companies, where he has spearheaded projects that have revolutionized the way we interact with technology on a daily basis.

Collaborations:

Throughout his career, Panwar has collaborated with top engineers, scientists, and researchers from renowned universities and tech giants, fostering a culture of innovation and excellence in all his projects.

Conclusion:

Ramesh K Panwar's relentless pursuit of innovation and his passion for pushing the boundaries of technology have solidified his position as a trailblazing inventor in the ever-evolving tech landscape.

Profile summary based on public USPTO records.

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