San Jose, CA, United States of America

Rajesh R Berigei

This inventor holds 2 USPTO granted patents. Top assignee: National Semiconductor Corporation. Active years: 2009-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rajesh R Berigei. Retrieved from https://idiyas.com/inventor/rajesh-r-berigei

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.8

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2009-2010

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Innovations of Rajesh R Berigei

Introduction

Rajesh R Berigei is a notable inventor based in San Jose, California. He has made significant contributions to the field of analog integrated circuit design, holding 2 patents that showcase his innovative approach to technology.

Latest Patents

One of his latest patents is the "Algorithmic Reactive Testbench for Analog Designs." This invention provides a high-level simulation and verification environment for analog integrated circuit designs. The Algorithmic Reactive Testbench (ART) system allows for the instantiation and operation of multiple analog testbenches as dictated by an algorithmic program. This system enhances the properties of unit testbenches through prior analysis, enabling effective communication between the test object and the algorithmic reactive testbench program.

Another significant patent is the "Dynamic Computation of ESD Guidelines." This automated method ensures that an adequate number of electrostatic discharge (ESD) protection cells are strategically placed around each pad in an integrated circuit design. This innovation is crucial for maintaining current sinking and voltage clamping during ESD events, thereby enhancing the reliability of electronic devices.

Career Highlights

Rajesh R Berigei is currently employed at National Semiconductor Corporation, where he continues to develop cutting-edge technologies in the field of semiconductor design. His work has had a lasting impact on the industry, particularly in improving the safety and efficiency of integrated circuits.

Collaborations

Throughout his career, Rajesh has collaborated with talented individuals such as Steve A Martinez and Jang Dae Kim. These partnerships have fostered a creative environment that has led to the development of innovative solutions in the field of electronics.

Conclusion

Rajesh R Berigei's contributions to the field of analog integrated circuit design through his patents and collaborations highlight his role as a significant innovator. His work continues to influence the industry and pave the way for future advancements in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…