Company Filing History:

11 out of 164,108

International Business Machines Corporation

Years Active: 2002-2017

where 'Filed Patents' based on already Granted Patents

12 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 9557378 - Method and structure for multi-core chip product test and selective voltage binning disposition (2017-01-31),

2. 8873269 - Read only memory bitline load-balancing (2014-10-28),

3. 8233302 - Content addressable memory with concurrent read and search/compare operations at the same memory cell (2012-07-31),

4. 7924588 - Content addressable memory with concurrent two-dimensional search capability in both row and column directions (2011-04-12),

5. 7619923 - Apparatus for reducing leakage in global bit-line architectures (2009-11-17),

6. 7515449 - CAM asynchronous search-line switching (2009-04-07),

7. 6920525 - Method and apparatus of local word-line redundancy in CAM (2005-07-19),

8. 6711040 - Saving content addressable memory power through conditional comparisons (2004-03-23),

9. 6597596 - Content addressable memory having cascaded sub-entry architecture (2003-07-22),

10. 6552920 - Saving content addressable memory power through conditional comparisons (2003-04-22),

11. 6512684 - Content addressable memory having cascaded sub-entry architecture (2003-01-28),

12. 6430072 - Embedded CAM test structure for fully testing all matchlines (2002-08-06),

Title: Innovations of Rahul K Nadkarni

Introduction

Rahul K Nadkarni is a prominent inventor based in Colchester, Vermont, known for his significant contributions to the field of integrated circuit technology. With a total of 12 patents to his name, he has made remarkable advancements in the testing and functionality of multi-core chip products.

Latest Patents

One of his latest patents is titled "Method and structure for multi-core chip product test and selective voltage binning disposition." This invention focuses on testing the operating speeds of integrated circuit devices to establish their maximum and minimum frequency at varying voltage levels. The devices are categorized into relatively slow and fast groups, allowing for effective classification into different voltage bins. A bin-specific voltage limit is established for each voltage bin, which is crucial for core performance under system use conditions. The method correlates system design evaluations with tested conditions to ensure optimal functionality.

Another notable patent is "Read only memory bitline load-balancing." This invention involves a Read Only Memory (ROM) bitline cell apparatus and programming method that enhances load balancing. The programming methodology ensures that the ROM structure maintains optimal performance by managing the connections of '1' devices on the bitline. This innovation allows for improved timing and efficiency in ROM structures.

Career Highlights

Throughout his career, Rahul has worked with leading companies in the technology sector, including IBM and Globalfoundries Inc. His experience in these organizations has contributed to his expertise in integrated circuit design and testing.

Collaborations

Rahul has collaborated with notable professionals in the field, including Thomas B Chadwick, Jr and Tarl S Gordon. These collaborations have further enriched his work and innovations.

Conclusion

Rahul K Nadkarni's contributions to the field of integrated circuits and memory technology demonstrate his innovative spirit and technical expertise. His patents reflect a commitment to advancing technology and improving device performance.

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