The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Mar. 18, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Rahul K. Nadkarni, Greenvalle, NC (US);

Daniel R. Baratta, Durha, NC (US);

Konark Patel, Cary, NC (US);

Hoan H. Nguyen, Raleigh, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 17/08 (2006.01); G06F 17/50 (2006.01); G11C 5/02 (2006.01); G11C 17/12 (2006.01);
U.S. Cl.
CPC ...
G11C 17/08 (2013.01); G06F 17/5077 (2013.01); G11C 5/025 (2013.01); G11C 17/12 (2013.01); G11C 17/126 (2013.01);
Abstract

A Read Only Memory (ROM) bitline cell apparatus and programming method therefore. The programming methodology ensures a ROM structure having open state and/or breaks in the diffusion and/or dummy wordline rows to provide bitline load balancing. The ROM bitline cell apparatus and programming method exhibits improved load balancing for any combination of 1's or all 0's on the bitline. The programming methodology identifies groups of consecutive '1's on the bitline and instead of connecting the '1' devices between BL/BL or GND/GND, those ‘1’ devices can be connected between BL/OPEN, OPEN/BL, GND/OPEN, OPEN/GND or OPEN/OPEN. With little or no variation in bitline loading, timing can be optimized for that single case of bitline loading.


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