Hillsboro, OR, United States of America

Rafael Trapani Possignolo

This inventor holds 1 USPTO granted patent and 10 published patent applications. Top assignee: Intel Corporation. Active years: 2026.

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Rafael Trapani Possignolo: Innovator in Hardware Processing Technology

Introduction

Rafael Trapani Possignolo is a notable inventor based in Hillsboro, Oregon. He has made significant contributions to the field of hardware processing technology. His innovative work has led to the development of a unique patent that enhances the efficiency of memory usage in hardware processor cores.

Latest Patents

Rafael Trapani Possignolo holds a patent for a "Hardware processor core having a memory sliced by linear address." This patent describes techniques for slicing memory of a hardware processor core by linear address. The invention includes memory circuitry with a cache comprising multiple slices of memory. Each cache line is stored in a single slice, with each slice storing a different range of address values compared to others. The patent outlines various components, including an incomplete load buffer, a store address buffer, a store data buffer, and a store completion buffer, all designed to optimize memory operations.

Career Highlights

Rafael is currently employed at Intel Corporation, where he continues to push the boundaries of technology. His work at Intel has allowed him to collaborate with other talented engineers and contribute to groundbreaking advancements in hardware processing.

Collaborations

Rafael has worked alongside notable colleagues such as Richard Klass and Mark Dechene. Their combined expertise has fostered an environment of innovation and creativity within their projects.

Conclusion

Rafael Trapani Possignolo is a distinguished inventor whose work in hardware processing technology has made a lasting impact. His patent demonstrates a commitment to improving memory efficiency in processor cores, showcasing his innovative spirit and dedication to advancing technology.

Profile summary based on public USPTO records.
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