Cupertino, CA, United States of America

Pulkit Khandelwal

This inventor holds 22 USPTO granted patents, primarily in Low-Latency Retiming. Top assignees: Astera Labs, Inc., Inphi Corporation, Asiera Labs, Inc.. Active years: 2017-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pulkit Khandelwal. Retrieved from https://idiyas.com/inventor/pulkit-khandelwal

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 90.9

Average Co-Inventor Count = 5.4

ph-index = 4

Forward Citations = 63(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2017 - 2018)
  • Cupertino, CA (US) (2021 - 2024)

Company Filing History:


Years Active: 2017-2026

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Areas of Expertise:
Low-Latency Retimer
Seamless Clock Switchover
Heterogenous Communication
Configurable Aggregation
Path-Coordinated Flow-Rate
Host-Interactive Data Logging
Mesochochronous Controllers
Digital Diagnostics
PAM Communication Systems
Skew Management
22 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Pulkit Khandelwal

Introduction

Pulkit Khandelwal, based in Cupertino, California, has made significant contributions to the field of technology, boasting an impressive portfolio of 17 patents. His innovative approaches to electronic signaling and processing have positioned him as a notable inventor in his industry.

Latest Patents

Among his latest inventions is a groundbreaking patent for a **Low-latency retimer with seamless clock switchover**. This technology provides a low-latency signaling link retimer that generates output signals synchronized with core clock signals from multiple clock sources. The switchover between these clock sources occurs without disrupting the core clock period or duty cycle, ensuring seamless signal transmission.

Another noteworthy patent is his **Low-latency signaling-link retimer**, which streamlines signal processing by concatenating discontiguous portions of a precoded and scrambled symbol stream. This innovation efficiently reduces the number of symbols queued between input and output, thus minimizing retimer transit latency and enhancing overall system performance.

Career Highlights

Pulkit has held key positions in reputable companies such as Astera Labs and Inphi Corporation. His work in these organizations has greatly influenced advancements in data transmission technologies and has reinforced his status as a leading inventor in his field.

Collaborations

Throughout his career, Pulkit has collaborated with several esteemed professionals, including Ken (Keqin) Han and Casey Morrison. These partnerships have not only fostered innovative ideas but have also contributed to the successful implementation of advanced technologies in the industry.

Conclusion

Pulkit Khandelwal's technological innovations and contributions are a testament to his expertise and creativity in the realm of electronic signaling. With a solid foundation of patents and impactful collaborations, he continues to shape the future of technology, establishing himself as a remarkable figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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