This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Force-Mos Technology Corporation. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Ping-chia Chung: Semiconductor Packaging Inventor
Introduction
Ping-chia Chung is an inventor associated with New Taipei, Taiwan. His work includes a patented method for making a multi-chip package device, addressing how semiconductor components are assembled, electrically connected, and packaged.
Latest Patents
The available information identifies one patent associated with Chung: Method of Making a Multi-Chip Package Device. The method begins with a lead-frame unit containing multiple lead frames, each with a base seat and leads. A transistor chip and a circuit control chip are attached to the base seat. A main conducting part covers the transistor chip and connects electrically to at least one source electrode pad, while the circuit control chip connects to another source electrode pad. After the chips are encapsulated, an exposed leg part is bent to form a planar conducting portion whose bottom surface is coplanar with the base seat’s bottom surface. This arrangement describes a packaging process that integrates multiple chips while forming a planar conductive portion.
Career Highlights
Chung is associated with Force-Mos Technology Corporation. His identified patent focuses on semiconductor packaging and the electrical integration of transistor and circuit-control chips. The record provided lists 1 patent.
Collaborations
Yuan-Shun Chang and Kao-Way Tu are identified as Chung’s coworkers. The available information does not specify their roles in the patent or other collaborative work.
Conclusion
Ping-chia Chung’s documented invention concerns a multi-chip packaging method that combines chip attachment, electrical connections, encapsulation, and lead-frame shaping. His patent record highlights a contribution to semiconductor device packaging associated with Force-Mos Technology Corporation.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile