Pinaki Mazumder

This inventor holds 13 USPTO granted patents and 1 published patent application. Top assignees: University of Michigan, Other. Active years: 1999-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pinaki Mazumder. Retrieved from https://idiyas.com/inventor/pinaki-mazumder

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13 (Patent Applications = 1)

% Patents Active = 76.9

Average Co-Inventor Count = 2.1

ph-index = 4

Forward Citations = 193(Granted Patents)

Company Filing History:

11 out of 3,536

University of Michigan

patents

2 out of 834,513

Other

patents

Years Active: 1999-2018

Loading Chart...

13 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9980197 - Baseband processing circuitry for wake-up receiver (2018-05-22),

2. 9941003 - Multi-level resistive memory structure (2018-04-10),

3. 9805791 - Resistive memory structure for single or multi-bit data storage (2017-10-31),

4. 9627042 - Static random access memory cell having improved write margin for use in ultra-low power application (2017-04-18),

5. 9557223 - Mach-Zehnder interferometer having a doubly-corrugated spoofed surface plasmon polariton waveguide (2017-01-31),

6. 9551655 - Metamaterial sensor platforms for terahertz DNA sensing (2017-01-24),

7. 9341921 - Terahertz analog-to-digital converter employing active-controlled spoofed surface plasmon polariton architecture (2016-05-17),

8. 9111613 - Adaptive reading of a resistive memory (2015-08-18),

9. 8842948 - Dynamic terahertz switching device comprising sub-wavelength corrugated waveguides and cavity that utilizes resonance and absorption for attaining on and off states (2014-09-23),

10. 8837036 - Dynamic terahertz switch using periodic corrugated structures (2014-09-16),

11. 7088143 - Dynamic circuits having improved noise tolerance and method for designing same (2006-08-08),

12. 6323709 - High-speed, compact, edge-triggered, flip-flop circuit (2001-11-27),

13. 5903170 - Digital logic design using negative differential resistance diodes and (1999-05-11),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: