Richmond, VA, United States of America

Peter Oswald

This inventor holds 2 USPTO granted patents. Top assignees: Infineon Technologies Richmond, LP, Other. Active years: 2003-2005.


% Patents Active = 100.0

Average Co-Inventor Count = 4.8

ph-index = 2

Forward Citations = 27(Granted Patents)


Location History:

  • Lakefield Mews, CT (US) (2003)
  • Richmond, VA (US) (2005)

Company Filing History:


Years Active: 2003-2005

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2 patents (USPTO):Explore Patents

Title: Innovations by Inventor Peter Oswald

Introduction

Peter Oswald is an accomplished inventor based in Richmond, VA (US). He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approach to failure classification and bit map compression.

Latest Patents

His latest patents include a method and apparatus for fast automated failure classification for semiconductor wafers. This invention involves determining failcodes for chips on a wafer and checking adjacent chips to identify failcode patterns. Another notable patent is for advanced bit fail map compression with fail signature analysis. This method provides a compressed bit fail map by testing semiconductor devices and transferring failure information to display a bit map that designates areas corresponding to failure locations.

Career Highlights

Peter has worked with Infineon Technologies Richmond, LP, where he applied his expertise in semiconductor technology. His work has contributed to advancements in the industry, particularly in improving the efficiency of failure analysis.

Collaborations

Throughout his career, Peter has collaborated with notable professionals such as Thomas Hladschik and Joerg Vollrath. These collaborations have further enriched his work and contributed to the development of innovative solutions in semiconductor technology.

Conclusion

Peter Oswald's contributions to semiconductor technology through his patents and collaborations highlight his role as a significant inventor in the field. His innovative methods continue to influence advancements in failure classification and bit map compression.

Profile summary based on public USPTO records.
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