Peter F Jarvis

Title: The Innovations of Peter F. Jarvis

Introduction

Peter F. Jarvis is an accomplished inventor based in Kunkletown, PA (US). He has made significant contributions to the field of integrated circuit design. His innovative approach has led to the development of a unique patent that enhances the efficiency of IC design processes.

Latest Patents

Peter F. Jarvis holds a patent for "Using a layer performance metric (LPM) to perform placement, routing, and/or optimization of an integrated circuit (IC) design." This patent describes techniques and systems for utilizing a layer performance metric during IC design. The method involves computing an LPM value for at least one timing path in the IC design, which is defined as the ratio between the wire length of the timing path and its delay. The LPM value is then used to optimize the placement, routing, or overall performance of the timing path. He has 1 patent to his name.

Career Highlights

Peter is currently employed at Synopsys, Inc., a leading company in electronic design automation. His work focuses on improving the design and functionality of integrated circuits, which are essential components in modern electronic devices. His innovative contributions have positioned him as a key figure in the industry.

Collaborations

Throughout his career, Peter has collaborated with notable colleagues, including Jason K. Werkheiser and Barry David Turner, Jr. These collaborations have further enhanced his work and contributed to advancements in integrated circuit design.

Conclusion

Peter F. Jarvis is a prominent inventor whose work in integrated circuit design has made a lasting impact on the field. His innovative patent demonstrates his commitment to improving technology and efficiency in electronic design.