The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2020
Filed:
Jan. 31, 2019
Applicant:
Synopsys, Inc., Mountain View, CA (US);
Inventors:
Jason K. Werkheiser, Fogelsville, PA (US);
Barry D. Turner, Jr., Leesport, PA (US);
Peter F. Jarvis, Kunkletown, PA (US);
Christopher M. Smirga, Collegeville, PA (US);
Assignee:
Synopsys, Inc., Mountain View, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 30/394 (2020.01); G06F 30/30 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/30 (2020.01); G06F 2119/12 (2020.01);
Abstract
Techniques and systems for using a layer performance metric (LPM) during integrated circuit (IC) design are described. Some embodiments can compute an LPM value for at least one timing path in the IC design, wherein the LPM value is equal to a ratio between a wire length of the timing path and a delay of the timing path. Next, the embodiments can use the LPM value of the timing path to perform at least one of placement, routing, or optimization of the timing path.