Irving, TX, United States of America

Pervez Hassan Sagarwala

This inventor holds 8 USPTO granted patents. Top assignee: Stmicroelectronics Gmbh. Active years: 1999-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pervez Hassan Sagarwala. Retrieved from https://idiyas.com/inventor/pervez-hassan-sagarwala

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 5

Forward Citations = 76(Granted Patents)


Location History:

  • Arlington, TX (US) (2000)
  • Grand Prairie, TX (US) (1999 - 2003)
  • Irving, TX (US) (2001 - 2004)

Company Filing History:


Years Active: 1999-2004

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8 patents (USPTO):Explore Patents

Title: Inventor Pervez Hassan Sagarwala: Contributions to Integrated Circuits and Memory Technology

Introduction: Pervez Hassan Sagarwala, based in Irving, TX, is a noteworthy inventor with a remarkable portfolio of eight patents. His innovative contributions primarily focus on advancements in integrated circuit devices and EEPROM memory technology. His work significantly impacts the field of electronics and semiconductor manufacturing.

Latest Patents: Among Sagarwala's latest innovations, one stands out: the CMOS integrated circuit device with LDD n-channel transistor and non-LDD p-channel transistor. This invention details a sophisticated method for fabricating integrated circuits by forming LDD regions for n-channel transistors that are self-aligned to gate electrodes. This process also includes the construction of oxide layers to ensure proper implantation of dopants, enhancing the performance of both n-channel and p-channel transistors.

Another significant patent is the EEPROM memory cell with increased dielectric integrity. This invention provides a unique approach to enhancing the oxide thickness at the edge of the tunnel oxide, thereby improving the dielectric integrity of capacitor structures. Sagarwala's innovative methodologies contribute to the reliability and durability of memory cells, leading to greater efficiency in electronic devices.

Career Highlights: Sagarwala is currently associated with STMicroelectronics GmbH, where he employs his expertise in semiconductor technology. His work at the company has been pivotal in developing advanced integrated circuits and memory solutions, contributing to the cutting-edge technology utilized in modern electronic devices.

Collaborations: Throughout his career, Sagarwala has collaborated with distinguished colleagues, including Tsiu Chiu Chan and Mehdi Zamanian. These partnerships have fostered a collaborative environment that promotes innovation and drives forward-thinking solutions in semiconductor technology.

Conclusion: Pervez Hassan Sagarwala is an influential figure in the realm of electronics and semiconductor innovations. His patents reflect a deep understanding of integrated circuits and memory technologies, showcasing a commitment to enhancing electronic performance. Through continuous innovation and collaboration, Sagarwala significantly contributes to the evolution of modern electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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