Beaverton, OR, United States of America

Paul Kayfes

This inventor holds 2 USPTO granted patents. Top assignees: Fujitsu Siemens Computers Gmbh, Intel Corporation. Active years: 2007-2008.


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 8(Granted Patents)


Company Filing History:


Years Active: 2007-2008

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2 patents (USPTO):Explore Patents

Title: Paul Kayfes: Innovator in Computer Architecture

Introduction

Paul Kayfes is a notable inventor based in Beaverton, OR (US). He has made significant contributions to the field of computer architecture, holding 2 patents that showcase his innovative approach to error reporting and system initialization.

Latest Patents

One of his latest patents is titled "Error reporting network in multiprocessor computer." This invention introduces a high-performance, high-reliable backplane bus with a simple configuration and operation. The error reporting network (ERN) provides an economical method for collecting the error state of an entire system in a uniform and consistent manner. This uniformity simplifies interface software and standardizes hardware handling of various error classes. In a preferred embodiment, serial error registers are utilized, which minimizes implementation costs and eases the software interface to these registers. The design ensures that serial error information is transmitted over a separate data path from the main parallel bus, reducing the risk of original errors corrupting the error information. Each CPU is equipped with a local copy of the complete error information, which enhances redundancy and minimizes the impact of potential CPU failures, allowing for coordinated error recovery.

Another significant patent by Kayfes is "System and method to initialize registers with an EEPROM stored boot sequence." This invention describes a method for initializing registers using configuration records read from an EEPROM connected to an ASIC during system reset. The configuration records specify which target registers to configure and the data to be written. These records are translated into register write requests, and the data is sent to the target registers via the ASIC's bus. During this initialization process, other masters, such as processors, may be blocked from accessing the registers, ensuring a smooth setup.

Career Highlights

Throughout his career, Paul Kayfes has worked with prominent companies such as Fujitsu Siemens Computers GmbH and Intel Corporation. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking technologies in the computing industry.

Collaborations

Some of his notable coworkers include Charles Sealey and John Lynch, who have also made significant contributions to the field.

Conclusion

Paul Kayfes is a distinguished inventor whose work in computer architecture has led to innovative solutions for error reporting and system initialization. His patents reflect a deep understanding of technology and a commitment to improving system reliability. His contributions continue to influence the field and inspire future innovations.

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