Intel Corporation

Fujitsu Siemens Computers Gmbh

Paul Kayfes

Mark S Myers

Jason Lewis

Wayne Moore

Stacey Lloyd

John Lynch

Charles Sealey

A high-performance, high-reliable backplane bus has a simple configuration and operation. An error reporting network (ERN) provides an inexpensive approach to collecting the error state of a whole system in a uniform and consistent way. The uniformity allows for simpler interface software and for standardized hardware handling of classes of errors. In a preferred embodiment, serial error registers are used, minimizing implementation cost and making the software interface to the serial registers much easier. Serial error information is transferred over a separate data path from the main parallel bus, decreasing the chance of the original error corrupting the error information. Each CPU is provided with a local copy of the entire body of error information. The redundancy minimizes the impact of a possible CPU failure and allows the CPUs to coordinate error recovery.

Error reporting network in multiprocessor computer

A system and method to initialize registers with an EEPROM stored boot sequence is described. The method includes reading configuration records from an EEPROM coupled to an ASIC upon system reset. The configuration records specify target configuration registers and data to be written to the registers. The configuration records are translated to register write requests and data is written to the target registers via a bus of the ASIC to initialize the registers. Other masters, such as a processor, may be blocked from accessing the registers during the initialization.

System and method to initialize registers with an EEPROM stored boot sequence

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Beaverton, OR, United States of America

Paul Kayfes