Boise, ID, United States of America

Paul J Rudeck

This inventor holds 45 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology. Top assignee: Micron Technology Incorporated. Active years: 2001-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Paul J Rudeck. Retrieved from https://idiyas.com/inventor/paul-j-rudeck

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 45 

% Patents Active = 77.8

Average Co-Inventor Count = 1.6

ph-index = 13

Forward Citations = 462(Granted Patents)


Location History:

  • Boise, ID (US) (2001 - 2011)
  • Hillsboro, OR (US) (2012)

Company Filing History:


Years Active: 2001-2012

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Areas of Expertise:
Semiconductor Devices
Floating Gate Transistor
Memory Cells
Programmable Memory
Selective Oxidation
Oxide Layer
3D Stacking
High Efficiency Programming
Re-Oxidation Method
Gate Coupling
Buried Source Rail
Isolation Trenches
45 patents (USPTO):Explore Patents

Title: Innovator Spotlight: Paul J Rudeck

Introduction: Paul J Rudeck, based in Boise, ID, is a prominent inventor in the semiconductor industry, holding a remarkable 45 patents. His innovative contributions have significantly advanced the technology landscape, particularly in methods related to semiconductor devices.

Latest Patents: Among his latest patented inventions include groundbreaking techniques aimed at optimizing semiconductor fabrication processes. One notable patent is "Methods of filling isolation trenches for semiconductor devices and resulting structures." This invention addresses the critical challenge of minimizing void formation during the isolation trench fill process for various trench configurations. The process involves the growth of a thin thermal oxidation layer on trench sidewalls, followed by a polysilicon deposition and oxidation cycle until full trench completion is achieved.

Another significant patent, "Semiconductor contact device," presents an advanced metallization method for creating memory cell arrays on substrates. This invention details the formation of discrete self-aligned vias and local area interconnects, which enable efficient electrical connections between junctions and source contacts, ultimately enhancing memory cell functionality.

Career Highlights: Paul J Rudeck's career is characterized by his dedication to innovation at Micron Technology Incorporated, where he has leveraged his expertise to drive advancements in semiconductor technology. His work has established him as a key figure in the industry, where his patents serve as a testament to his creativity and technical proficiency.

Collaborations: Throughout his career, Rudeck has collaborated with esteemed colleagues, including Andrei Mihnea and Chun Chen. These partnerships have fostered a dynamic environment for innovative thinking and collaborative problem-solving, thus contributing to the robust patent portfolio he has built.

Conclusion: Paul J Rudeck continues to make significant strides in the semiconductor field with his innovative ideas and patents. His contributions not only reflect his technical capabilities but also his commitment to pioneering solutions that enhance technology in meaningful ways. As he advances his career, the impact of his work will undoubtedly be felt across the industry for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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