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For the Inventor, By the Inventor

San Jose, CA, United States of America

Parimal Gaikwad

This inventor holds 12 USPTO granted patents and 1 published patent application and 1 EPO patent, primarily in Interconnect Fabric. Top assignees: Arteris, Inc., Provino Technologies, Inc., Google Inc.. Active years: 2018-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Parimal Gaikwad. Retrieved from https://idiyas.com/inventor/parimal-gaikwad

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 12 

% Patents Active = 100.0

 

Average Co-Inventor Count = 1.5

ph-index = 3

Forward Citations = 20(Granted Patents)


Location History:

  • Mountain View, CA (US) (2020)
  • San Jose, CA (US) (2018 - 2022)
  • Sunnyvale, CA (US) (2020 - 2023)

Company Filing History:

goldMedal9 out of 107 
 
Arteris, Inc.
 patents
silverMedal2 out of 4 
 
Provino Technologies, Inc.
 patents
bronzeMedal1 out of 34,118 
 
Google Inc.
 patents

Years Active: 2018-2023

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Areas of Expertise:
Interconnect Fabric
Memory Access
Error Recovery
Coherent Systems
ECC Management
Redundancy Techniques
System on Chip
Directory Storage
Bandwidth Management
Routing Procedures
Functional Redundancy
12 patents (USPTO):Explore Patents
1. 11640362 - Procedures for improving efficiency of an interconnect fabric on a system on chip (2023-05-02),
2. 11513892 - System and method for using a directory to recover a coherent system from an uncorrectable error (2022-11-29),
3. 11416352 - System and method for logic functional redundancy (2022-08-16),
4. 11385957 - System for memory access bandwidth management using ECC (2022-07-12),
5. 11003604 - Procedures for improving efficiency of an interconnect fabric on a system on chip (2021-05-11),
6. 10877839 - Recovery of a coherent system in the presence of an uncorrectable error (2020-12-29),
7. 10866854 - System and method for reducing ECC overhead and memory access bandwidth (2020-12-15),
8. 10592358 - Functional interconnect redundancy in cache coherent systems (2020-03-17),
9. 10585825 - Procedures for implementing source based routing within an interconnect fabric on a system on chip (2020-03-10),
10. 10452272 - System to reduce directory information storage (2019-10-22),
11. 10452266 - Directory storage control for commonly used patterns (2019-10-22),
12. 10146615 - Recovery of a system directory after detection of uncorrectable error (2018-12-04),

Title: The Innovative Journey of Parimal Gaikwad

Introduction: Parimal Gaikwad is a visionary inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Parimal Gaikwad holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his commitment to driving progress through innovation.

Career Highlights: With a career spanning over two decades, Parimal Gaikwad has worked with leading tech companies, research institutions, and universities, where he has spearheaded projects that have revolutionized the industry.

Collaborations: Throughout his career, Parimal Gaikwad has collaborated with top engineers, scientists, and researchers, fostering a culture of creativity and excellence that has led to numerous successful inventions and patents.

Conclusion: Parimal Gaikwad's relentless pursuit of innovation and his passion for pushing the boundaries of technology make him a true pioneer in the world of inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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