This inventor holds 4 USPTO granted patents. Top assignee: Renesas Technology Corp.. Active years: 2007-2010.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2007-2010
Title: Nobutaka Imanishi: Semiconductor Memory Inventor.
Introduction
Nobutaka Imanishi is an inventor associated with Hyogo, Japan, and Renesas Technology Corp. His patent work includes semiconductor memory designs focused on reducing memory-array area while preserving floating-gate widths. His record includes 4 patents.
Latest Patents
One of Imanishi’s latest patent descriptions concerns a semiconductor memory with select gates extending in straight lines along the X direction. Two rows of floating gates are arranged between the upper and lower select gates in a staggered, zigzag pattern. Floating gates in adjacent columns are offset from one another along the Y direction. This arrangement is intended to reduce the area of a memory-array block without reducing the floating gates’ widths.
Career Highlights
Imanishi’s described invention addresses memory-array layout and efficient use of semiconductor-device area. He is associated with Renesas Technology Corp., a company involved in semiconductor technology.
Collaborations
His listed coworkers include Yutaka Takikawa and Koichi Kawauchi.
Conclusion
Nobutaka Imanishi’s patent work highlights a staggered floating-gate arrangement designed to make semiconductor memory arrays more compact while maintaining gate widths.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile