This inventor holds 1 USPTO granted patent. Top assignee: Synopsys, Inc.. Active years: 2025.
Company Filing History:
Years Active: 2025
Title: Innovations of Nishant Chauhan in Clock Gating Verification
Introduction
Nishant Chauhan is a notable inventor based in Kurukshetra, India. He has made significant contributions to the field of circuit design, particularly in the area of clock gating verification. His innovative approach has led to the development of a patented method that enhances the efficiency of circuit designs.
Latest Patents
Nishant Chauhan holds a patent for "Performing automatic sign-off for clock gating verification using toggle cover properties." This invention provides a method or system for clock gating verification of a circuit design. The system identifies a set of sequential components and nets within the circuit design. Each net is configured to provide a signal to a clock pin of a sequential component. The system identifies a subset of nets associated with toggle signals, which transition between two different signal values. For each net in this subset, the system determines one or more toggle cover properties. Additionally, it assesses the depth of at least one net in the subset and performs sign-off for the clock gating verification based on the toggle cover properties and the depth of the net.
Career Highlights
Nishant is currently employed at Synopsys, Inc., where he continues to innovate and contribute to advancements in circuit design. His work focuses on improving verification processes, which are crucial for the reliability and performance of electronic devices.
Collaborations
Some of his coworkers include Hanish Singla and Sudipta Kundu, who collaborate with him on various projects within the company.
Conclusion
Nishant Chauhan's contributions to clock gating verification represent a significant advancement in circuit design technology. His innovative patent showcases his expertise and commitment to enhancing electronic systems.
