The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2025
Filed:
Nov. 15, 2022
Synopsys, Inc., Mountain View, CA (US);
Synopsys, Inc., Sunnyvale, CA (US);
Abstract
A method or system for clock gating verification of a circuit design. The system identifies a set of sequential components of the circuit design, and a set of nets of the circuit design. Each net is configured to provide a signal to a clock pin of a sequential component. The system then identifies a subset of nets that are associated with toggle signals, each of which transitions between two different signal values. For each of the subset of nets, the system determines one or more toggle cover properties. The system also determines a depth of at least one net in the subset of nets, and performs sign off for the clock gating verification based on the toggle cover properties and the depth of the at least one net.