Toronto, Canada

Nicola Pantaleo

This inventor holds 4 USPTO granted patents and 2 published patent applications. Top assignee: Intel Corporation. Active years: 2013-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nicola Pantaleo. Retrieved from https://idiyas.com/inventor/nicola-pantaleo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

Average Co-Inventor Count = 10.2

ph-index = 2

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2013-2014

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4 patents (USPTO):Explore Patents

Title: Nicola Pantaleo: Patent Contributions to Integrated Circuit Design

Introduction

Nicola Pantaleo is an inventor based in Toronto, Canada, whose patent work includes circuitry for improving power supply rejection and adjusting the bandwidth of phase-locked loops. He is associated with Intel Corporation and has 4 patents.

Latest Patents

Two of Pantaleo’s latest patents address aspects of phase-locked loop (PLL) and delay-locked loop (DLL) circuitry.

“System Incorporating Power Supply Rejection Circuitry and Related Method” describes a system that supplies a circuit with a filtered version of power from an external source. In one embodiment, a low-pass filter provides a filtered signal to the gate of a field-effect transistor, which modifies the supplied power. The approach is intended to improve power supply rejection in PLL or DLL circuitry.

“System and Method Providing Bandwidth Adjustment in Integral Path of Phase Locked Loop Circuitry” concerns programmable adjustment of PLL dynamics. The described circuitry digitizes signals representing phase and frequency differences, then generates an integral-path input. A programmable low-pass filter and transistor device process that input to produce an adjustment signal for controlling the frequency of the voltage-controlled oscillator’s output.

Career Highlights

Pantaleo’s listed patent work focuses on circuit techniques for managing power supply noise and controlling PLL behavior. These inventions describe ways to filter signals and adjust circuit responses, supporting more precise operation of integrated electronic systems.

Collaborations

Pantaleo is associated with Intel Corporation. His listed coworkers include Raymond Kwok Kei Tang and Rajeevan Mahadevan.

Conclusion

Nicola Pantaleo’s patent contributions reflect work on power supply rejection and programmable bandwidth control in PLL and DLL circuitry, connecting his inventions with practical challenges in integrated circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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