This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Necati Uysal: Circuit Design and Insertion-Delay Optimization.
Introduction
Necati Uysal is an inventor based in Austin, Texas, whose patent work addresses timing optimization in circuit design. He is associated with Cadence Design Systems, Inc.
Latest Patents
Uysal is named on one patent, 1 patent: “Non-critical child node-based insertion delay optimization in circuit design.” The invention describes methods for optimizing insertion delay by using one or more non-critical child nodes of a critical node in a routing tree. Electronic design automation software can apply the approach to reduce insertion delay in a circuit’s clock tree.
Career Highlights
Uysal’s patent reflects work on electronic design automation and the optimization of circuit timing. The disclosed technique focuses on using routing-tree structure to improve insertion delay.
Collaborations
The patent’s listed collaborators include Sheiny Fabre Almeida and Natarajan Viswanathan. The invention is associated with Cadence Design Systems, Inc.
Conclusion
Necati Uysal’s patent contribution centers on reducing insertion delay in circuit designs through routing-tree-based optimization.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
