logo

For the Inventor, By the Inventor

Osaka, Japan

Naotsugu Yamamura

This inventor holds 5 USPTO granted patents. Top assignee: Megachips Corporation. Active years: 2015-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naotsugu Yamamura. Retrieved from https://idiyas.com/inventor/naotsugu-yamamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5

% Patents Active = 80.0

Average Co-Inventor Count = 2.3

ph-index = 1


Location History:

  • Kitakatsuragi-gun, JP (2015)
  • Osaka, JP (2015 - 2019)

Company Filing History:

goldMedal5 out of 365 
 
Megachips Corporation
 patents

Years Active: 2015-2019

Loading Chart...
5 patents (USPTO):Explore Patents
1. 10327009 - Image processor (2019-06-18),
2. 9641867 - Image processor (2017-05-02),
3. 9407919 - Image coding apparatus (2016-08-02),
4. 9053387 - Image processing circuit and image detection device (2015-06-09),
5. 9031341 - Image coding apparatus (2015-05-12),

Title: Naotsugu Yamamura: Innovator in Image Processing Technology

Introduction

Naotsugu Yamamura is a prominent inventor based in Osaka, Japan. He has made significant contributions to the field of image processing, holding a total of five patents. His work has been instrumental in advancing technology in this area, particularly through innovative solutions that enhance image quality and processing efficiency.

Latest Patents

Yamamura's latest patents focus on advanced image processing techniques. One of his notable inventions involves a method for determining reference images during vertical synchronization periods. In this process, a first reference image determination circuit selects a local decoded image generated in the vertical synchronization period immediately preceding an error occurrence. This method utilizes multiple local decoded images stored in a first DRAM. Additionally, a second reference image determination circuit employs a decoded image from the vertical synchronization period prior to the error among multiple decoded images stored in a second DRAM. These innovations aim to improve the reliability and quality of image processing systems.

Career Highlights

Naotsugu Yamamura is currently associated with Megachips Corporation, where he continues to develop cutting-edge technologies in image processing. His expertise and innovative mindset have positioned him as a key player in the industry. His contributions have not only advanced the company's objectives but have also influenced the broader field of image processing technology.

Collaborations

Yamamura has collaborated with notable colleagues, including Akira Okamoto and Nobuyuki Takasu. These partnerships have fostered a creative environment that encourages the exchange of ideas and the development of groundbreaking technologies.

Conclusion

Naotsugu Yamamura's work in image processing exemplifies the impact of innovation on technology. His patents and collaborations reflect a commitment to advancing the field, making him a significant figure in the world of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…