Image processing circuit and image detection device

Abstract

Each second selection circuit selects, out of a plurality of evaluation values, an evaluation value being in a predetermined relative positional relation with a first evaluation value as an evaluation value outputted from a first selection circuit, and outputs the selected value. The predetermined relative positional relations are different from one another among a plurality of second selection circuits. Every time a second evaluation value is outputted from the second selection circuit corresponding to the integration circuit, the integration circuit reads a weigh value corresponding to a combination of the second evaluation value and the first evaluation, which makes a pair with the second evaluation and is outputted from the first selection circuit, from a storage circuit corresponding to the second selection circuit and integrates the read values. An addition circuit at least adds a plurality of integrated values outputted from a plurality of integration circuits, and an addition value obtained thereby becomes a probability value.