Naohiro Shibata

Title: Naohiro Shibata: Innovator in Multiprocessor Technology

Introduction

Naohiro Shibata is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of multiprocessor technology, holding three patents that showcase his innovative approach to memory access and cache coherence.

Latest Patents

Shibata's latest patents include a multiprocessor design that connects multiple processors via a system bus. This multiprocessor features processor groups, a main storage memory, a cache memory, a cache control unit, a directory memory, and a directory control unit. The directory control unit is equipped with an invalidation command issuing unit that issues cache line invalidation commands to all reference designations stored in the directory memory. This innovation reduces the frequency of cache invalidation commands, thereby shortening device process time. Another notable patent is the coherence apparatus for cache in a multiprocessor system. This design connects several processors, each with caches, through an internal snoop bus, while maintaining separate cache coherence operations within and outside the processor group.

Career Highlights

Throughout his career, Naohiro Shibata has worked with notable companies such as Fujitsu Corporation and PFU Limited. His experience in these organizations has allowed him to refine his skills and contribute to advancements in technology.

Collaborations

Shibata has collaborated with esteemed colleagues, including Akira Kabemoto and Toshiyuki Muta. Their joint efforts have further propelled innovations in the field of multiprocessor systems.

Conclusion

Naohiro Shibata's work in multiprocessor technology has significantly impacted the industry. His patents reflect a deep understanding of memory access and cache coherence, making him a key figure in technological advancements.