The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 1999

Filed:

Feb. 07, 1996
Applicant:
Inventors:

Akira Kabemoto, Kawasaki, JP;

Naohiro Shibata, Kawasaki, JP;

Toshiyuki Muta, Kawasaki, JP;

Takayuki Shimamura, Kawasaki, JP;

Hirohide Sugahara, Kawasaki, JP;

Junji Nishioka, Kawasaki, JP;

Takatsugu Sasaki, Kawasaki, JP;

Satoshi Shinohara, Kawasaki, JP;

Yozo Nakayama, Aza Unoke-machi, JP;

Jun Sakurai, Sendai, JP;

Hiroaki Ishihata, Kawasaki, JP;

Takeshi Horie, Kawasaki, JP;

Toshiyuki Shimizu, Kawasaki, JP;

Assignees:

Fujitsu Limited, Kawasaki, JP;

PFU Limited, Kahoku, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711141 ; 711120 ; 711147 ;
Abstract

A plurality of processors, each with caches provided for a plurality of processor modules and a local storage in which a main storage is distributed and arranged are mutually connected through an internal snoop bus. The processor modules are mutually connected through a second system bus. By using two separate buses, cache coherence operations within a processor group is kept separate from cache coherence operations outside the processor group.


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