The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2000

Filed:

Jul. 13, 1999
Applicant:
Inventors:

Takatsugu Sasaki, Kawasaki, JP;

Akira Kabemoto, Kawasaki, JP;

Hirohide Sugahara, Kawasaki, JP;

Junji Nishioka, Kawasaki, JP;

Satoshi Shinohara, Kawasaki, JP;

Yozo Nakayama, Kahoku-gun, JP;

Jun Sakurai, Sendai, JP;

Naohiro Shibata, Kawasaki, JP;

Toshiyuki Muta, Kawasaki, JP;

Takayuki Shimamura, Kawasaki, JP;

Assignees:

Fujitsu Limited, Kawasaki, JP;

PFU Limited, Kahoku-gun, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
713500 ; 710 58 ; 710 45 ;
Abstract

A multiprocessor in which a plurality of processors are connected via a system bus. The multiprocessor includes processor groups each having at least one processor, a main storage memory, a cache memory, a cache control unit, a directory memory, and a directory control unit. The directory control unit includes an invalidation command issuing unit that issues a cache line invalidation command to all reference designations stored in the directory memory in cache lines. Thus the device process time can be shortened by reducing the frequency that cache invalidation commands are issued from the cache memory.


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