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For the Inventor, By the Inventor

Goleta, CA, United States of America

Nahmsuk Oh

USPTO Granted Patents = 15 

Average Co-Inventor Count = 2.5

ph-index = 5

Forward Citations = 258(Granted Patents)


Location History:

  • Goleta, CA (US) (2008 - 2014)
  • Mountain View, CA (US) (2020)
  • Palo Alto, CA (US) (2012 - 2022)

Company Filing History:

goldMedal15 out of 2,485 
 
Synopsys, Inc.
 patents

Years Active: 2008-2024

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15 patents (USPTO):Explore Patents
1. 12175181 - Timing-aware surgical optimization for engineering change order in chip design (2024-12-24),
2. 11537775 - Timing and placement co-optimization for engineering change order (ECO) cells (2022-12-27),
3. 10867091 - Machine learning based power optimization using parallel training and localized data generation (2020-12-15),
4. 10817634 - Machine-learning circuit optimization using quantized prediction functions (2020-10-27),
5. 10339258 - Look-ahead timing prediction for multi-instance module (MIM) engineering change order (ECO) (2019-07-02),
6. 9390221 - Linear complexity prioritization of timing engineering change order failures (2016-07-12),
7. 8924906 - Determining a design attribute by estimation and by calibration of estimated value (2014-12-30),
8. 8555235 - Determining a design attribute by estimation and by calibration of estimated value (2013-10-08),
9. 8407655 - Fixing design requirement violations in multiple multi-corner multi-mode scenarios (2013-03-26),
10. 8341574 - Crosstalk time-delay analysis using random variables (2012-12-25),
11. 8336013 - Determining an order for visiting circuit blocks in a circuit design for fixing design requirement violations (2012-12-18),
12. 8219952 - Variation aware victim and aggressor timing overlap detection by pessimism reduction based on relative positions of timing windows (2012-07-10),
13. 7962876 - Generation of engineering change order (ECO) constraints for use in selecting ECO repair techniques (2011-06-14),
14. 7900165 - Determining a design attribute by estimation and by calibration of estimated value (2011-03-01),
15. 7454731 - Generation of engineering change order (ECO) constraints for use in selecting ECO repair techniques (2008-11-18),

Title: The Innovations of Nahmsuk Oh: Pioneering Advances in Chip Design

Introduction: Nahmsuk Oh is a renowned inventor based in Goleta, California, holding a remarkable total of 15 patents. His contributions to the field of integrated circuit design showcase innovative approaches that enhance the efficiency and performance of complex electronic systems.

Latest Patents: Among his latest intellectual property developments, Nahmsuk Oh has introduced two notable patents. The first, "Timing-aware surgical optimization for engineering change order in chip design," outlines a method for optimizing circuit layout designs. This technique involves identifying target and non-critical nets within a circuit and making adjustments to ensure that performance characteristics remain within defined constraints.

The second patent, "Timing and placement co-optimization for engineering change order (ECO) cells," details a system for optimizing both timing and placement of ECO cells in a current design. This method includes assessing timing slacks of neighboring cells and repositioning them to create the necessary space for placing new ECO cells, ensuring that designs meet performance requirements efficiently.

Career Highlights: Nahmsuk Oh currently works at Synopsys, Inc., a leading company in electronic design automation. His work focuses on developing innovative solutions that facilitate the design and optimization of complex integrated circuits, making significant impacts in the semiconductor industry.

Collaborations: Throughout his career, Nahmsuk has collaborated with esteemed colleagues such as Peivand Fallah-Tehrani and Alireza Kasnavi. These collaborations have further propelled advancements in the field, demonstrating a team-oriented approach to tackling challenges in chip design.

Conclusion: Nahmsuk Oh's inventive spirit and dedication to advancing chip design technology have made him a key player in the field of integrated circuits. His latest patents reflect a commitment to innovation and excellence, shaping the future of electronic design and optimization. His work continues to inspire and influence the next generation of inventors and engineers in the tech industry.

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