Gyeonggi-do, South Korea

Nae-Eung Lee

This inventor holds 2 USPTO granted patents. Top assignee: Jusung Engineering Co., Ltd.. Active years: 2008-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nae-Eung Lee. Retrieved from https://idiyas.com/inventor/nae-eung-lee-tpf2kg78

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2008-2012

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2 patents (USPTO):Explore Patents

Title: Nae-Eung Lee: Innovator in Semiconductor Technology

Introduction

Nae-Eung Lee is a prominent inventor based in Gyeonggi-do, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His innovative methods have advanced the processes involved in forming thin film patterns and etching masks.

Latest Patents

Nae-Eung Lee's latest patents include a "Method of forming thin film pattern for semiconductor device and apparatus for the same." This method involves several steps, such as forming a thin film on a substrate and creating an amorphous carbon layer. The process also includes forming a hard mask layer and etching to achieve the desired thin film pattern. Another notable patent is the "Method of forming etching mask," which outlines a procedure for depositing a hard mask film and patterning photoresist to enhance etch selectivity.

Career Highlights

Nae-Eung Lee is currently employed at Jusung Engineering Co., Ltd., where he continues to develop innovative solutions in semiconductor manufacturing. His work has been instrumental in improving the efficiency and effectiveness of semiconductor devices.

Collaborations

He collaborates with talented coworkers, including Gi-Chung Kwon and Chang-Ki Park, who contribute to the innovative environment at Jusung Engineering Co., Ltd.

Conclusion

Nae-Eung Lee's contributions to semiconductor technology through his patents and collaborative efforts highlight his role as a key innovator in the industry. His work continues to influence advancements in semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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