This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2012.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2012
Title: Mohit Mittal: Innovator in Parallel ECC Error Location
Introduction
Mohit Mittal is a notable inventor based in Punjab, India. He has made significant contributions to the field of memory error correction through his innovative patent. His work focuses on enhancing the efficiency of error location in memory systems.
Latest Patents
Mohit Mittal holds a patent titled "Method and apparatus for parallel ECC error location." This invention provides a method for parallel ECC error location in a memory system. The process involves partitioning a set of field elements into multiple partitions. For each partition, a set of different field elements is provided to parallel search elements. Each search element computes a sum based on coefficients of an error locator polynomial and the provided field element. This method advances the set of field elements in GF(2) and repeats the operations for the next set of field elements.
Career Highlights
Mohit Mittal is currently employed at Cadence Design Systems, Inc., where he applies his expertise in memory systems and error correction. His work has contributed to advancements in the reliability and performance of memory technologies.
Collaborations
Some of his coworkers include Steven Lee Shrader and Anujan Varma, who collaborate with him on various projects within the company.
Conclusion
Mohit Mittal's innovative work in parallel ECC error location showcases his commitment to improving memory technology. His contributions are valuable to the field and highlight the importance of innovation in addressing complex challenges.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile