Nagano, Japan

Mio Emura

This inventor holds 1 USPTO granted patent. Top assignee: Fict Limited. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mio Emura. Retrieved from https://idiyas.com/inventor/mio-emura-nfqn6nl2

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Mio Emura: Circuit Board Innovation

Introduction

Mio Emura is an inventor associated with Nagano, Japan, and Fict Limited. Her work includes a patent for a circuit board designed to improve reliability across a wide temperature range.

Latest Patents

Emura is associated with 1 patent: “Circuit board, method for manufacturing circuit board, and electronic device.” The invention addresses the challenge of preventing cracks in a circuit board that contains an embedded semiconductor device. Its described configuration laminates a first insulating substrate onto a second insulating substrate with a first adhesive layer between them. The semiconductor device is embedded in a portion formed in the first insulating substrate. The stated objective is to support reliable operation over a wide temperature range.

Career Highlights

Emura’s patent work reflects an interest in circuit-board construction and the integration of semiconductor devices. The patent describes a structural approach intended to reduce cracking and improve operational reliability.

Collaborations

Emura is associated with Fict Limited. Her coworker, Kenji Iida, is also identified in the provided information.

Conclusion

Mio Emura’s circuit-board patent presents a layered design for embedding a semiconductor device while addressing cracking and reliability concerns across a wide temperature range.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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