Zhubei City, Taiwan

Ming-Yang Liu

This inventor holds 1 USPTO granted patent. Top assignee: Mpi Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ming-Yang Liu. Retrieved from https://idiyas.com/inventor/ming-yang-liu-qzknqdtg

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: The Innovations of Ming-Yang Liu

Introduction

Ming-Yang Liu is a notable inventor based in Zhubei City, Taiwan. He has made significant contributions to the field of semiconductor technology. His work focuses on enhancing the efficiency and effectiveness of probe systems used in testing semiconductor devices.

Latest Patents

Ming-Yang Liu holds a patent for a "Positioning method and probe system for performing the same, method for operating probe system, and method for utilizing probe system to produce a tested semiconductor device." This innovative patent outlines a positioning method that is utilized for positioning multiple probe assemblies with an under-test device that includes several pads. Each probe assembly is equipped with at least one probe tip that corresponds to each pad for contact. The patent also defines at least one fixed probe assembly and at least one motorized probe assembly during the positioning process.

Career Highlights

Ming-Yang Liu is associated with Mpi Corporation, where he applies his expertise in semiconductor testing technologies. His work at the company has contributed to advancements in the field, particularly in the development of efficient testing methods for semiconductor devices.

Collaborations

Due to space constraints, the collaborations section will be omitted.

Conclusion

Ming-Yang Liu's innovative contributions to semiconductor testing through his patented methods and systems highlight his importance in the field. His work continues to influence advancements in technology and improve testing processes for semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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